The end of Dennard scaling and Moore's law have ushered hardware into an era of heterogeneity. On the processor side, heterogeneous multicore processors combine cores with diverse performance and power tradeoffs to promise energy efficiency. On the storage side, hybrid memory combines DRAM and non-volatile memory (NVM) to deliver low latency, high capacity, and persistence. Future heterogeneous systems will also have accelerators to speed up critical applications, and field programmable gate arrays to offer flexibility. How best to utilize hardware heterogeneity is an important question. Prior hardware and operating system approaches seek transparency to application developers. Unfortunately, these approaches are sub-optimal because they cannot use semantic information in the runtime system. In this talk, I will motivate using managed language runtimes, rich in semantic information, to abstract the complexity of heterogeneous processors and memories.  I will discuss at length garbage collection in managed runtimes, such as the Java Virtual Machine or the Common Language Runtime, as an abstraction to mitigate NVM wear-out in hybrid DRAM-NVM memory. I will show new insights about writes in popular Java applications. These insights lead to a new class of write-rationing garbage collectors that exploit fine-grained object behaviors in Java applications to limit NVM writes. They extend NVM lifetime by placing highly written objects in DRAM and the rest in NVM. I will discuss Kingsguard, a write-rationing garbage collector that dynamically monitors writes to place highly written objects in DRAM. I will also introduce Crystal Gazer, a profile-driven write-rationing garbage collector that exploits static profiling of writes on a per allocation-site basis to place highly written objects in DRAM. Static profiling eliminates the performance overhead of dynamic monitoring in Kingsguard. These new write-rationing garbage collectors are the first to make NVM practical as a main memory capacity expansion for commodity applications. Finally, I will provide directions for future research in architectures, runtime systems, and evaluation methodologies for emerging hardware.