Dr Beau Johnston
My capacity is as a Computer Scientist at the Future Technologies Group at Oak Ridge National Laboratory, Tennessee, but having received my PhD at the ANU and still being physically based in Canberra, I am well placed to continue my research which originates from my time at the ANU and targeted for current Oak Ridge objectives. This presents the opportunity of having student projects that are directly focused on current HPC research problems which should strengthen a partnership between the ANU and Oak Ridge.
My thesis was in High-Performance Computing (HPC) and Programming Languages. More specifically, I investigated the patterns/characteristics of scientific workloads and their impact on performance over a range of accelerator hardware.
I developed a tool to perform Architecture-Independent Workload Characterization (AIWC -- pronounced | \ 'air-wik) -- which extracts features critical to performance. I then built models using machine learning to perform accurate predictions of AIWC features to their performance on different accelerators.
Scientific discovery is becoming increasingly dependant on supercomputers, which require increasingly large and more complex simulations. Accelerators are critical for the next generation of these supercomputers -- offering energy-efficiency where it is sorely needed. My work is applicable to workload scheduling (to better use these massive machines) and evaluating prospective hardware before manufacture (to allow the most appropriate supercomputers to be built based on the envisaged scientific workloads).
AIWC is also useful to guide developers to potential software optimizations -- and is my active area of research. On a day to day basis, my work focuses on enabling the full suite of programming languages used in HPC (OpenMP, OpenACC, OpenCL and CUDA) to use AIWC and the predictive framework.
My mission is to develop tools which allow the better use of computational resources for scientific discovery -- facilitating computer scientists and computational/data scientists to make more discoveries, faster.
- Johnston, B, Falzon, G & Milthorpe, J 2018, 'OpenCL performance prediction using architecture-independent features', 16th International Conference on High Performance Computing and Simulation, HPCS 2018, ed. K Zine-Dine & W Smari, IEEE, United States, pp. 561-569pp.
- Johnston, B & Milthorpe, J 2018, 'AIWC: OpenCL-Based architecture-independent workload characterization', 5th IEEE/ACM Workshop on the LLVM Compiler Infrastructure in HPC, LLVM-HPC 2018, IEEE, Piscataway, United States, pp. 81-91pp.
- Johnston, B & Milthorpe, J 2018, 'Dwarfs on accelerators: Enhancing OpenCL benchmarking for heterogeneous computing architectures', Proceedings of the 47th International Conference on Parallel Processing Companion. [hide] 
- Johnston, B, Lee, C, Angove, L et al 2017, 'Embedded Accelerators for Scientific High-Performance Computing: An Energy Study of OpenCL Gaussian Elimination Workloads', 46th International Conference on Parallel Processing Workshops, ICPPW 2017, ed. Randall Bilof, IEEE, TBC, pp. 59-68.
- Johnston, B & McCreath, E 2017, 'Parallel huffman decoding: presenting a fast and scalable algorithm for increasingly multicore devices', 15th IEEE International Symposium on Parallel and Distributed Processing with Applications and 16th IEEE International Conference on Ubiquitous Computing and Communications, ISPA/IUCC 2017, ed. Guojun Wang, Geoffrey Fox, Gregorio Martinez, Richard Hill and Peter Mueller, IEEE, TBC, pp. 949-958.
- Gaurav Mitra, Beau Johnston, Eric C. McCreath, Jun Zhou, and Alistair P. Rendell, 2013 'Use of SIMD Vector Operations to Accelerate Application Code Performance on Low-Powered ARM and Intel Platforms', 2013 IEEE 27th International Symposium on Parallel & Distributed Processing Workshops and PhD Forum (IPDPSW), IEEE Computer Society, New York USA, pp. 1107 - 1116.